The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

Sep. 10, 2015
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, JP;

Inventor:

Toshihiko Iinuma, Yokkaichi, JP;

Assignee:

KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01); H01L 29/792 (2006.01); H01L 29/45 (2006.01); H01L 29/417 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1157 (2013.01); H01L 27/11582 (2013.01); H01L 29/41741 (2013.01); H01L 29/456 (2013.01);
Abstract

A semiconductor memory device includes a silicon substrate having an impurity diffusion region, and a memory cell array. The memory cell array includes conductive layers laminated on the silicon substrate via interlayer insulation layers, a semiconductor layer extending in a direction of the lamination of the conductive layers, a charge storage film disposed between the conductive layers and the semiconductor layer, and an electrode disposed on the conductive layers. A groove having a direction of the lamination as a depth direction and a first direction different from the lamination direction as a lengthwise direction is formed through the conductive layers. The silicon substrate includes a silicide film disposed in the impurity diffusion region along the groove. The memory cell array includes a conductor, which is in contact with the electrode and the silicide film, in the groove. In the first direction, the conductor is shorter in length than the groove.


Find Patent Forward Citations

Iinuma, Toshihiko. (2016). Semiconductor memory device and production method thereof (U.S. Patent No. 9412754). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9412754

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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