The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

Aug. 18, 2015
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Tomohiro Hayashi, Tokyo, JP;

Yoshiyuki Kawashima, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/115 (2006.01); H01L 21/266 (2006.01); H01L 21/265 (2006.01); H01L 21/3213 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); H01L 21/02164 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/28273 (2013.01); H01L 21/28282 (2013.01); H01L 21/32133 (2013.01); H01L 27/11526 (2013.01); H01L 27/11568 (2013.01); H01L 27/11573 (2013.01); H01L 29/4234 (2013.01); H01L 29/42324 (2013.01); H01L 29/6656 (2013.01);
Abstract

An improvement is achieved in the performance of a semiconductor device. In a method of manufacturing the semiconductor device, using a control gate electrode and a memory gate electrode which are formed over a semiconductor substrate as a mask, n-type impurity ions are implanted from a direction perpendicular to a main surface of the semiconductor substrate. Then, using the control gate electrode, the memory gate electrode, and first and second sidewall spacers as a mask, other n-type impurity ions are implanted from a direction inclined relative to the direction perpendicular to the main surface of the semiconductor substrate.


Find Patent Forward Citations

Hayashi, Tomohiro. (2016). Method of manufacturing semiconductor device having an implanting from a second direction inclined relative to a first direction (U.S. Patent No. 9412748). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9412748

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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