The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2016
Filed:
Mar. 15, 2013
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Changkyu Seol, Gyeonggi-do, KR;
Junjin Kong, Gyeonggi-do, KR;
Hong Rak Son, Gyeonggi-do, KR;
Younggeon Yoo, Seoul, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-Si, Gyeonggi-Do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); H03M 11/00 (2006.01); G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 12/02 (2006.01); G11C 16/26 (2006.01); G11C 11/56 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1008 (2013.01); G06F 11/1044 (2013.01); G06F 11/1072 (2013.01); G06F 12/0246 (2013.01); G11C 11/5642 (2013.01); G11C 16/26 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract
Disclosed is a bit-state mapping method of a flash memory system which maps m-bit data (m being a natural number more than 2) onto one of 2states (voltage threshold distributions). The bit-state mapping method includes performing a subset partitioning operation during first to (m−1)th levels under a condition that two adjacent states are processed as one state; and distinguishing between the adjacent states while processing an (m)th level.