The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

May. 05, 2014
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Ajay Bhatia, Saratoga, CA (US);

Michael Dreesen, Austin, TX (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G11C 5/14 (2006.01); G06F 12/06 (2006.01); G06F 12/02 (2006.01); G11C 7/10 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 12/0223 (2013.01); G06F 12/06 (2013.01); G11C 5/14 (2013.01); G11C 5/147 (2013.01); G11C 7/1096 (2013.01); G11C 11/419 (2013.01); G06F 2212/1016 (2013.01);
Abstract

A system and method for managing power in a memory, wherein the system may include a processor and a memory unit coupled to the processor. The memory unit may initialize an address decoder into a first power mode. In response to receiving a command and an address corresponding to a location within the memory unit, the memory unit may use the first stage of the address decoder to decode at least a portion of the address. The memory unit may further switch a selected portion of a second stage of the address decoder from the first power mode to the second power mode, wherein the selected portion of the second stage of the address decoder is selected dependent upon an output signal of the first stage of the address decoder.


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