The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 2016

Filed:

Mar. 14, 2013
Applicant:

Ps4 Luxco S.a.r.l., Luxembourg, LU;

Inventors:

Hideyuki Yokou, Tokyo, JP;

Manabu Ishimatsu, Tokyo, JP;

Naoki Ogawa, Tokyo, JP;

Assignee:

PS4 Luxco S.a.r.l., Luxembourg, LU;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); G01R 31/3187 (2006.01); G11C 5/02 (2006.01); G11C 5/06 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3187 (2013.01); G11C 5/025 (2013.01); G11C 5/063 (2013.01); G11C 29/1201 (2013.01);
Abstract

Disclosed herein is a device that includes a semiconductor substrate, a check circuit and a through-substrate via. The check circuit includes a check line formed over the semiconductor substrate and including first and second parts each extending in a first direction and a third part extending in a second direction that crosses the first direction, the first and second parts being opposite to each other, the third part connecting one end of the first part with one end of the second part, a charge circuit coupled to a one end of the check line, and a comparator coupled to the other end of the check line at a first input node thereof. The through-substrate via penetrates through the semiconductor substrate and is located in an area that is between the first and second parts of the check line.


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