The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Dec. 30, 2011
Applicants:

Paul Penzes, Irvine, CA (US);

Mark Fullerton, Austin, TX (US);

Hwisung Jung, Irvine, CA (US);

John Walley, Ladera Ranch, CA (US);

Tim Sippel, Portland, OR (US);

Love Kothari, Sunnyvale, CA (US);

Inventors:

Paul Penzes, Irvine, CA (US);

Mark Fullerton, Austin, TX (US);

Hwisung Jung, Irvine, CA (US);

John Walley, Ladera Ranch, CA (US);

Tim Sippel, Portland, OR (US);

Love Kothari, Sunnyvale, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); H03L 7/08 (2006.01); H03K 3/03 (2006.01); H03K 3/037 (2006.01); H03K 19/01 (2006.01); G06F 12/14 (2006.01); G06F 21/44 (2013.01); H03K 5/13 (2014.01); H03L 7/097 (2006.01); H03L 7/099 (2006.01); G06F 1/32 (2006.01); G06F 1/26 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0802 (2013.01); G06F 1/32 (2013.01); G06F 12/14 (2013.01); G06F 21/44 (2013.01); H03K 3/0315 (2013.01); H03K 3/0375 (2013.01); H03K 5/133 (2013.01); H03K 19/01 (2013.01); H03L 7/097 (2013.01); H03L 7/0997 (2013.01); G06F 1/26 (2013.01); G06F 1/3203 (2013.01); G06F 1/3228 (2013.01); H01L 2924/0002 (2013.01); H03K 2005/00026 (2013.01); H03K 2005/00058 (2013.01);
Abstract

Systems and methods are presented for reducing the impact of high load and aging on processor cores in a processor. A Power Management Unit (PMU) can monitor aging, temperature, and increased load on the processor cores. The PMU instructs the processor to take action such that aging, temperature, and/or increased load are approximately evenly distributed across the processor cores, so that the processor can continue to efficiently process instructions.


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