The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

May. 17, 2015
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Inayat Ali, Jabalpur, IN;

Parul Sharma, Noida, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0016 (2013.01);
Abstract

A system for isolating a first power domain from a second power domain in an integrated circuit includes receiving an input signal from the first power domain and receiving a set of bits from a programmable register. An isolation enable signal indicative of isolating the first power domain from the second power domain is generated, and an intermediate signal based on the isolation enable signal and the input signal is generated. At least one of the input signal, a logic low signal, a logic high signal, and the intermediate signal is output based on the isolation enable signal and the set of bits.


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