The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

Nov. 25, 2014
Applicants:

Mayank Jain, Ambala Cantt, IN;

Sanjoy K. Dey, Noida, IN;

Inventors:

Mayank Jain, Ambala Cantt, IN;

Sanjoy K. Dey, Noida, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/20 (2006.01);
U.S. Cl.
CPC ...
H02H 3/20 (2013.01);
Abstract

An over-voltage protection circuit suitable for use at a front-end of an on-chip analog module such as an analog-to-digital converter (ADC) includes an input potential divider that can be disconnected from the module when the module is idle (or working on any other input such as the ADC sampling another channel causing the current channel to be idle) while still providing protection for front-end devices. A first NMOS transistor pair connects or disconnects the potential divider to or from ground in response to a control signal, and a second transistor pair including a NMOS transistor and a PMOS transistor ensures that the output does not rise above the supply voltage.


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