The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 02, 2016

Filed:

May. 19, 2014
Applicant:

Telefonaktiebolaget L M Ericsson (Publ), Stockholm, SE;

Inventors:

Mikko Lintonen, Oulu, FI;

Marko Pessa, Oulu, FI;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/46 (2006.01); G05F 1/56 (2006.01); H03K 17/16 (2006.01);
U.S. Cl.
CPC ...
G05F 1/468 (2013.01); G05F 1/56 (2013.01); H03K 17/163 (2013.01);
Abstract

A power management circuit generates a reference voltage and distributes it to a plurality of independently-enabled regulator voltage reference circuits. Separate enable signals and enable pre-charge signals are distributed to each regulator voltage reference circuit. As a regulator voltage reference circuit is enabled via its associated enable signal, an enable pre-charge signal is also asserted for an initial duration. Each regulator voltage reference circuit includes a voltage setting circuit and a first current limiting transistor in series and operative to interrupt current to the voltage setting circuit when the regulator voltage reference circuit is disabled. A second current limiting transistor is configured as a current mirror with the first current limiting transistor, and a pre-charge bias current from a current source passes through the second transistor. This limits the current through the first transistor and into the voltage setting circuit for the initial duration.


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