The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 2016

Filed:

Dec. 05, 2014
Applicant:

Sunpower Corporation, San Jose, CA (US);

Inventors:

Timothy Weidman, Sunnyvale, CA (US);

David D. Smith, Campbell, CA (US);

Assignee:

SunPower Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 31/18 (2006.01); H01L 31/0224 (2006.01); H01L 31/068 (2012.01); H01L 31/0352 (2006.01);
U.S. Cl.
CPC ...
H01L 31/182 (2013.01); H01L 31/022441 (2013.01); H01L 31/035272 (2013.01); H01L 31/0682 (2013.01); H01L 31/1864 (2013.01); H01L 31/1872 (2013.01); H01L 31/1876 (2013.01); Y02E 10/546 (2013.01); Y02E 10/547 (2013.01); Y02P 70/521 (2015.11);
Abstract

Methods of fabricating solar cell emitter regions using ion implantation, and resulting solar cells, are described. In an example, a method of fabricating alternating N-type and P-type emitter regions of a solar cell involves forming a silicon layer above a substrate. Dopant impurity atoms of a first conductivity type are implanted, through a first shadow mask, in the silicon layer to form first implanted regions and resulting in non-implanted regions of the silicon layer. Dopant impurity atoms of a second, opposite, conductivity type are implanted, through a second shadow mask, in portions of the non-implanted regions of the silicon layer to form second implanted regions and resulting in remaining non-implanted regions of the silicon layer. The remaining non-implanted regions of the silicon layer are removed with a selective etch process, while the first and second implanted regions of the silicon layer are annealed to form doped polycrystalline silicon emitter regions.


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