The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2016

Filed:

Dec. 20, 2013
Applicant:

Seiko Instruments Inc., Chiba-shi, Chiba, JP;

Inventors:

Koichi Shimazaki, Chiba, JP;

Yoshitsugu Hirose, Chiba, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 27/02 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0266 (2013.01); H01L 27/0207 (2013.01); H01L 27/0277 (2013.01); H01L 27/0292 (2013.01); H01L 29/41758 (2013.01); H01L 29/78 (2013.01);
Abstract

In order to provide a semiconductor device having high ESD tolerance, a plurality of source wirings () are formed of metal films having the same shape and electrically connect a plurality of sources () to a ground voltage wiring (), respectively, a plurality of drain wirings () are formed of metal films having the same shape and electrically connect a plurality of drains () to an input voltage wiring (), respectively, and a plurality of gate wirings () are formed of metal films having the same shape and electrically connect a plurality of gates () to the ground voltage wiring (), respectively. Further, a back gate wiring () is formed of a metal film and electrically connects a back gate () to the ground voltage wiring (), and the back gate wiring () is separated from the source wiring () formed on the source ().


Find Patent Forward Citations

Loading…