The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2016

Filed:

Dec. 15, 2011
Applicants:

Dieter Fuechsle, Endingen, CH;

Daniel Neeser, Thalwil, CH;

Bernhard Doser, Waldshut-Tiengen, DE;

Daniel Müller, Zürich, CH;

Marlene Ljuslinder, Ennetbaden, CH;

Felix Greuter, Baden-Rütihof, CH;

Inventors:

Dieter Fuechsle, Endingen, CH;

Daniel Neeser, Thalwil, CH;

Bernhard Doser, Waldshut-Tiengen, DE;

Daniel Müller, Zürich, CH;

Marlene Ljuslinder, Ennetbaden, CH;

Felix Greuter, Baden-Rütihof, CH;

Assignee:

ABB Research Ltd, Zurich, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 1/00 (2006.01); H01C 7/12 (2006.01); G01R 31/02 (2006.01); H02H 3/04 (2006.01); H02G 13/00 (2006.01);
U.S. Cl.
CPC ...
H01C 7/12 (2013.01); G01R 31/021 (2013.01); H02G 13/80 (2013.01); H02H 3/048 (2013.01);
Abstract

Exemplary embodiments are directed to a device with overvoltage protection that includes a varistor which can be connected by a first connection via a first line to high-voltage potential in a circuit arrangement, while a second connection is connected to ground via a second line. Furthermore, an additional impedance is provided, which can be connected between the second connection and ground or the first connection and the high voltage, or is mounted fixed in this position. The corresponding line can be interrupted by a switching arrangement. In order to test the withstand voltage of the circuit arrangement, at least one of the first and second line is interrupted and an additional impedance is inserted. A test voltage is applied to the circuit arrangement. After the overvoltage test, the interruption in at least one of the first and second lines is removed again.


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