The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2016

Filed:

Jan. 19, 2010
Applicant:

Chee Wai Yap, Penang, MY;

Inventor:

Chee Wai Yap, Penang, MY;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01); G06F 21/76 (2013.01);
U.S. Cl.
CPC ...
G06F 21/76 (2013.01);
Abstract

A method and apparatuses for securing an integrated circuit (IC) with a self-destruction mechanism are provided. The IC has a tamper detect circuit that will detect unwanted or unauthorized access to the IC. The IC may store configuration and user data in a memory module. The memory module may be an internal or an external non-volatile or volatile memory source. Configuration and user data stored in the memory module is erased when a tamper condition is detected. The IC is powered down after the erase operation is completed. When the IC is powered down, data stored in a static random access memory (SRAM) module in the IC is erased. When the IC is powered up again, the IC will be in a non-operative state as the configuration data has been completely erased.


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