The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2016

Filed:

Sep. 25, 2007
Applicants:

Michael K. Wong, Cupertino, CA (US);

Rabin A. Sugumar, Sunnyvale, CA (US);

Stephen E. Phillips, Los Gatos, CA (US);

Hugh Kurth, Lexington, MA (US);

Suraj Sudhir, Sunnyvale, CA (US);

Jochen Behrens, Santa Cruz, CA (US);

Inventors:

Michael K. Wong, Cupertino, CA (US);

Rabin A. Sugumar, Sunnyvale, CA (US);

Stephen E. Phillips, Los Gatos, CA (US);

Hugh Kurth, Lexington, MA (US);

Suraj Sudhir, Sunnyvale, CA (US);

Jochen Behrens, Santa Cruz, CA (US);

Assignee:

Oracle America, Inc., Redwood City, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/28 (2006.01); G06F 15/173 (2006.01);
U.S. Cl.
CPC ...
G06F 15/17356 (2013.01);
Abstract

A server interconnect system includes a first server node operable to send and receive messages and a second server nodes operable to send and receive messages. The system further comprises a first interface unit in communication with the first server node and a second interface unit in communication with the second server node. The first interface unit has a first set of message send registers and a first set of message receive registers. Similarly, the second interface unit has a second set of message send registers and a second set of message receive registers. The server interconnect system also includes a communication switch that receives and routes a message from the first or second server nodes when either of the first or second registers indicates that a valid message is ready to be sent. A method implemented by the server interconnect system is also provided.


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