The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

Jun. 09, 2014
Applicants:

Toyota Jidosha Kabushiki Kaisha, Toyota-shi, Aichi-ken, JP;

Denso Corporation, Kariya-shi, Aichi-ken, JP;

Inventors:

Yukihiko Watanabe, Nagakute, JP;

Sachiko Aoi, Nagakute, JP;

Hidefumi Takaya, Toyota, JP;

Atsuya Akiba, Kariya, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/872 (2006.01); H01L 29/66 (2006.01); H01L 27/02 (2006.01); H01L 21/04 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7806 (2013.01); H01L 21/049 (2013.01); H01L 21/0495 (2013.01); H01L 27/0255 (2013.01); H01L 29/66068 (2013.01); H01L 29/66734 (2013.01); H01L 29/872 (2013.01); H01L 29/1608 (2013.01); H01L 29/7813 (2013.01);
Abstract

A FET incorporating a Schottky diode has a structure allowing the ratio of an area in which the Schottky diode is formed and an area in which the FET is formed to be freely adjusted. A trench extending for a long distance is utilized. Schottky electrodes are interposed at positions appearing intermittently in the longitudinal direction of the trench. By taking advantage of the growth rate of a thermal oxide film formed on SiC being slower, and the growth rate of a thermal oxide film formed on polysilicon being faster, a structure can be obtained in which insulating film is formed between gate electrodes and Schottky electrodes, between the gate electrodes and a source region, between the gate electrodes and a body region, and between the gate electrodes and a drain region, and in which insulating film is not formed between the Schottky electrodes and the drain region.


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