The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2016
Filed:
Mar. 21, 2013
Renesas Electronics Corporation, Kawasaki-shi, JP;
Tatsuya Fukumura, Kanagawa, JP;
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Abstract
Provided is a method of manufacturing a semiconductor device which allows an operation of the semiconductor device to be stabilized without increasing the area occupied thereby. The control gate electrode of a memory cell transistor is formed, and then the memory gate electrode thereof is formed on a lateral side of the control gate electrode. Then, memory offset spacers are formed over the side walls of the memory gate electrode. Then, the memory source region of the memory cell transistor is formed by ion implantation using the memory gate electrode, the memory offset spacers, and the like as a mask. Then, the memory drain region of the memory cell transistor is formed by ion implantation. Then, in the memory cell transistor, sidewall insulating films are formed. The memory offset spacers disappear through cleaning or the like before the sidewall insulating films are formed.