The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

Jun. 20, 2013
Applicant:

Fujitsu Limited, Kawasaki-shi, Kanagawa, JP;

Inventors:

Tetsuya Takahashi, Nagano, JP;

Yasuo Moriya, Kawasaki, JP;

Kimio Nakamura, Suzaka, JP;

Assignee:

FUJITSU LIMITED, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/03 (2013.01); H01L 24/07 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/92 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/75314 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81204 (2013.01); H01L 2224/81208 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/83204 (2013.01); H01L 2224/83209 (2013.01); H01L 2224/83856 (2013.01); H01L 2224/83862 (2013.01); H01L 2224/92242 (2013.01);
Abstract

A method for manufacturing an electronic device, the method includes: applying an adhesive film on a package board; placing an electronic component on the package board with a bump therebetween; applying a first load to the electronic component while heating the electronic component to a first temperature higher than a reaction start temperature of the adhesive film and lower than a melting point of the bump; reducing the first load to a second load lower than the first load while maintaining the first temperature; and heating the electronic component to a second temperature higher than or equal to the melting point of the bump while maintaining the second load.


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