The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

Jul. 25, 2012
Applicants:

Kei Yamamoto, Tokyo, JP;

Kazuhiro Tada, Tokyo, JP;

Hideki Komori, Tokyo, JP;

Toru Kimura, Tokyo, JP;

Masaki Goto, Tokyo, JP;

Hiroyuki Yoshihara, Tokyo, JP;

Inventors:

Kei Yamamoto, Tokyo, JP;

Kazuhiro Tada, Tokyo, JP;

Hideki Komori, Tokyo, JP;

Toru Kimura, Tokyo, JP;

Masaki Goto, Tokyo, JP;

Hiroyuki Yoshihara, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/367 (2006.01); H01L 23/34 (2006.01); B23P 15/26 (2006.01); H01L 23/433 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/373 (2006.01); H01L 29/16 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3672 (2013.01); H01L 21/4871 (2013.01); H01L 21/4882 (2013.01); H01L 21/56 (2013.01); H01L 21/565 (2013.01); H01L 23/3107 (2013.01); H01L 23/3735 (2013.01); H01L 23/4334 (2013.01); H01L 29/1602 (2013.01); H01L 29/1608 (2013.01); H01L 29/2003 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/181 (2013.01);
Abstract

An object is to provide a fin integrated type semiconductor device and a method of manufacturing the same, which are provided with a simple structure and good heat dissipation characteristics. The semiconductor device includes: a base plate on which fins arranged in a standing condition are formed on a first main face; an insulating layer formed on a second main face of the base plate, the second main face being opposite to the first main face of the base plate; a circuit pattern fixed to the insulating layer; and a semiconductor element joined to the circuit pattern. The fins are formed with slits that pass through in the thickness direction of the fins.


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