Leakage current compensation with reference bit line sensing in non-volatile memory

Abstract

A non-volatile memory includes a sense amplifier that uses a reference bit line. The sense amplifier includes a first capacitor coupled to a selected bit line and a second capacitor coupled to a reference bit line. The reference capacitor compensates for displacement currents in the selected bit line during sensing. Both plates of the capacitors are utilized to cancel leakage currents. The top plates of the capacitors are precharged then discharged during a sense phase. The selected bit line capacitor is discharged based on the selected cell current and the leakage current. The amount of discharge is transferred to the bottom plate of each capacitor, followed by discharging the bottom plates. The capacitor for the selected bit line is discharged based on the leakage current. In this manner, the correction phase facilitates a compensation based on the leakage current so that the selected cell current can be determined.