The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 2016
Filed:
Jan. 16, 2013
Applicant:
Soitec, Bernin, FR;
Inventors:
Richard Ferrant, Esquibien, FR;
Roland Thewes, Kleinmachnow, DE;
Assignee:
Soitec, , FR;
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/08 (2006.01); G11C 7/06 (2006.01); G11C 7/12 (2006.01); G11C 11/4091 (2006.01); G11C 11/4094 (2006.01);
U.S. Cl.
CPC ...
G11C 7/08 (2013.01); G11C 7/062 (2013.01); G11C 7/12 (2013.01); G11C 11/4091 (2013.01); G11C 11/4094 (2013.01); G11C 2211/4016 (2013.01);
Abstract
A circuit for sensing a difference in voltage on a pair of dual signal lines comprising a first signal line and a second signal line complementary to the first signal line, comprising:
Ferrant, Richard. (2016). Circuit and method for sensing a difference in voltage on a pair of dual signal lines, in particular through equalize transistor (U.S. Patent No. 9390771). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9390771
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile