The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

Apr. 14, 2014
Applicant:

Stec, Inc., Santa Ana, CA (US);

Inventor:

Ashot Melik-Martirosian, San Diego, CA (US);

Assignee:

HGST Technologies Santa Ana, Inc., Santa Ana, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G06F 11/07 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G06F 11/076 (2013.01); G11C 16/349 (2013.01);
Abstract

A method populates a parameter set for dynamically adjusting an operating condition in a memory block of a non-volatile memory circuit. A desired condition limit is identified, and a first parameter is computed as a function of a first memory operation to be performed on the memory block. The first parameter is included in a parameter set, and the memory block is cycled until the operating condition reaches the desired condition limit. After cycling, a second parameter is determined as a function of a second memory operation to be performed on the memory block, and the second parameter is included in the parameter set. The steps of cycling, and determining and the including the second parameter may be repeated until a desired number of cycles/parameters are reached. A retention bake may also be performed on the memory circuit, and a bit error rate resulting from a read operation verified.


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