The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Jan. 15, 2014
Applicant:

Cisco Technology, Inc., San Jose, CA (US);

Inventors:

Clarence Filsfils, Brussels, BE;

George L. Swallow, Boston, MA (US);

Assignee:

Cisco Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/703 (2013.01); H04L 12/707 (2013.01); H04L 12/715 (2013.01); H04L 12/46 (2006.01); H04L 12/721 (2013.01);
U.S. Cl.
CPC ...
H04L 45/28 (2013.01); H04L 12/4645 (2013.01); H04L 45/04 (2013.01); H04L 45/22 (2013.01); H04L 45/66 (2013.01);
Abstract

A method, apparatus, and computer-readable storage medium are disclosed for processing shared risk group (SRG) information in communications networks. The method includes obtaining at least one SRG identifier by processing SRG information included in network information received at a first network layer from a second network layer, and processing the at least one SRG identifier using one or more operations configured to ensure that the SRG identifier is unique among a plurality of SRG identifiers. The apparatus includes a network interface adapted to receive network information comprising SRG information, a processor coupled to the network interface, and a memory coupled to the processor and adapted to obtain at least one SRG identifier by processing the SRG information and to process the at least one SRG identifier. The computer-readable storage medium is configured to store program instructions that when executed are configured to cause a processor to perform the method.


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