The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Dec. 27, 2013
Applicant:

Realtek Semiconductor Corp., Hsinchu, TW;

Inventors:

Chi-Kung Kuan, Daxi Township, Taoyuan County, TW;

Chia-Liang Lin, Fremont, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 7/033 (2006.01); H04L 25/14 (2006.01); H03L 7/099 (2006.01);
U.S. Cl.
CPC ...
H04L 7/033 (2013.01); H03L 7/0996 (2013.01); H04L 7/0087 (2013.01); H04L 25/14 (2013.01); H04L 7/0337 (2013.01);
Abstract

A serial data link receiver and method are provided. In one implementation, the receiver includes a first equalizer for receiving a first received signal and outputting a first equalized signal, and a second equalizer for receiving a second received signal and outputting a second equalized signal. The receiver further includes an analog CDR (clock-data recovery) circuit for receiving the first equalized signal and outputting a first recovered bit stream and a first recovered clock generated in accordance with an analog control voltage, and a digital CDR circuit for receiving the second equalized signal and the first recovered clock and outputting a second recovered bit stream and a second recovered clock based on selecting a phase of the first recovered clock in accordance with a digital phase selection signal.


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