The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Oct. 18, 2013
Applicant:
Altera Corporation, San Jose, CA (US);
Inventors:
Jun Liu, Milpitas, CA (US);
Yanzhong Xu, Santa Clara, CA (US);
Bonnie I. Wang, Cupertino, CA (US);
Jeffrey T. Watt, Palo Alto, CA (US);
Assignee:
Altera Corporation, San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/0175 (2006.01); H03K 19/017 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017509 (2013.01); H03K 19/0005 (2013.01); H03K 19/0013 (2013.01); H03K 19/01721 (2013.01);
Abstract
An integrated circuit is disclosed. The integrated circuit includes an input-output (IO) buffer circuit. The IO buffer circuit further includes first and second transistors coupled in series. The first transistor receives an input signal and the second transistor receives a pulsed voltage signal. Furthermore, a method to operate the IO buffer circuit is also disclosed.