The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Oct. 15, 2015
Applicant:

Sungrow Power Supply Co., Ltd., Hefei, Anhui, CN;

Inventors:

Xiaoxun Li, Anhui, CN;

Haoyuan Li, Anhui, CN;

Xiaodong Mei, Anhui, CN;

Zhiqiang Han, Anhui, CN;

Benhe Yang, Anhui, CN;

Kai Shen, Anhui, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01); H03K 7/08 (2006.01); H02M 7/5395 (2006.01);
U.S. Cl.
CPC ...
H03K 7/08 (2013.01); H02M 7/5395 (2013.01);
Abstract

A method and a device for generating PWM pulses for an inverter are provided. The three-phase inverter's characteristic of including high frequency complementary switches is used. Only three PWM peripheral units of a DSP control unit are used to output PWM high frequency signals, and a detection control unit determine for each phase two currently high frequency complementary switches according to the states of detected level signals outputted by a preset number of GPIO interfaces. The PWM high frequency signals are distributed for each phase to one of the two switches, and the PWM high frequency signals are inversed and then sent to the other one of the two switches. In addition, the states of other switches are maintained unchanged according to a preset correspondence between states of switches of a multi-level inverter and outputted level signals in different switching periods.


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