The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Sep. 02, 2014
Applicant:

Kabushiki Kaisha Toshiba, Minato-Ku, Tokyo, JP;

Inventors:

Yoichi Hori, Himeji Hyogo, JP;

Takao Noda, Himeji Hyogo, JP;

Tsuyoshi Oota, Ibo Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/02 (2006.01); H01L 29/872 (2006.01); H01L 23/00 (2006.01); H01L 23/482 (2006.01); H01L 29/06 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/872 (2013.01); H01L 23/482 (2013.01); H01L 24/05 (2013.01); H01L 24/49 (2013.01); H01L 29/0619 (2013.01); H01L 29/1608 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/4813 (2013.01); H01L 2224/4846 (2013.01); H01L 2224/4847 (2013.01); H01L 2224/491 (2013.01);
Abstract

A semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.


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