The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Nov. 27, 2013
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Johannes Georg Laven, Taufkirchen, DE;
Maria Cotorogea, Taufkirchen, DE;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/10 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/40 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 21/26586 (2013.01); H01L 29/0696 (2013.01); H01L 29/086 (2013.01); H01L 29/0865 (2013.01); H01L 29/1095 (2013.01); H01L 29/407 (2013.01); H01L 29/41766 (2013.01); H01L 29/4236 (2013.01); H01L 29/66719 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/7811 (2013.01);
Abstract
A semiconductor mesa is formed in a semiconductor layer between a first cell trench structure and a second cell trench structure extending from a first surface into the semiconductor layer. An opening is formed in a capping layer formed on the first surface, wherein the opening exposes at least a portion of the semiconductor mesa. Through the opening impurities of a first conductivity type are introduced into the exposed portion of the semiconductor mesa. A recess defined by the opening is formed.