The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Nov. 10, 2014
Fuji Electric Co., Ltd., Kawasaki-shi, JP;
Hiroki Wakimoto, Matsumoto, JP;
FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;
Abstract
In a method for manufacturing a reverse blocking MOS semiconductor device, a gettering polysilicon layer is formed on a rear surface of an FZ silicon substrate. Then, a pisolation layer for obtaining a reverse voltage blocking capability is formed. A front surface structure including a MOS gate structure is formed on a front surface of the FZ silicon substrate. The rear surface of the FZ silicon substrate is ground to reduce the thickness of the FZ silicon substrate. The gettering polysilicon layer is formed with such a thickness that it remains, without being vanished by single crystallization, until a process for forming the front surface structure including the MOS gate structure ends. Therefore, it is possible to sufficiently maintain the gettering function of the gettering polysilicon layer even in a heat treatment process subsequent to an isolation diffusion process.