The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Dec. 11, 2014
Amit Aggarwal, Ghaziabad, IN;
Rohit Gupta, Panchkula, IN;
Ashish Malhotra, Noida, IN;
Andrey Malkov, Moscow, RU;
Evgeny A. Shevchenko, Moscow, RU;
Amit Aggarwal, Ghaziabad, IN;
Rohit Gupta, Panchkula, IN;
Ashish Malhotra, Noida, IN;
Andrey Malkov, Moscow, RU;
Evgeny A. Shevchenko, Moscow, RU;
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
An integrated circuit (IC) includes a first I/O cell, a logic cell, a trigger signal generation circuit, and a second I/O cell having a voltage selection pin. I/O interfaces of the first I/O cell receive first and second supply voltages, respectively, and I/O interfaces of the second I/O cell receive third and fourth supply voltages, respectively. The first I/O cell generates a first trigger signal when the first supply voltage reaches a first predetermined voltage. The logic cell receives the first trigger signal and generates a safe-state signal. The trigger signal generation circuit generates a second trigger signal when the third supply voltage reaches a second predetermined voltage. The voltage selection pin receives the safe-state signal and the second trigger signal and sets the second I/O cell in a safe-state mode, which protects the second I/O cell from over voltage damage.