The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 2016

Filed:

Jul. 21, 2014
Applicant:

Century Technology (Shenzhen) Corporation Limited, Shenzhen, CN;

Inventors:

Ming-Tsung Wang, New Taipei, TW;

Kuo-Chieh Chi, New Taipei, TW;

Qi Xu, Shenzhen, CN;

Dan Chen, Shenzhen, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1339 (2006.01); G02F 1/1362 (2006.01);
U.S. Cl.
CPC ...
G02F 1/1339 (2013.01); G02F 1/1362 (2013.01); G02F 1/13394 (2013.01); H01L 27/1288 (2013.01);
Abstract

An array substrate of an LCD includes a substrate, a first wiring layer, a semiconductor film, an insulating layer, a second wiring layer, a passivation layer, a conductive film, and a spacer. The first wiring layer is patterned to a gate line, a gate electrode, and a first laminating layer. The semiconductor film is patterned to a channel layer and a second laminating layer. The second wiring layer is patterned to a source line, a source electrode, a drain electrode, and a third laminating layer. The conductive film is patterned to a pixel electrode and a fourth laminating layer. The spacer is a laminating structure at least includes the first, second, third, fourth laminating layers. A portion of insulating layer overlaps with the first laminating layer, and a portion of passivation layer overlaps with the third laminating layer.


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