The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 05, 2016
Filed:
Jul. 10, 2014
Texas Instruments Deutschland Gmbh, Freising, DE;
Johannes Gerber, Unterschleissheim, DE;
Bernhard Ruck, Freising, DE;
Asif Qaiyum, Freising, DE;
Ruediger Kuhn, Freising, DE;
TEXAS INSTRUMENTS DEUTSCHLAND GMBH, Freising, DE;
Abstract
A dual-comparator circuit includes a main comparator providing a first decision output (outmain) including a main MOS differential pair, and an auxiliary comparator including an auxiliary MOS differential pair providing a second decision output (outaux). The auxiliary comparator receives a differential input voltage (Vin), and generates a control signal that is coupled to an enable input of the main comparator. A first operating mode (OM) is implemented when |Vin|<a predetermined voltage level (PVL), where the control signal activates the main comparator. A second OM is implemented when |Vin|≧PVL where the main differential pair is protected by a switch from developing transient voltage input offset (VIO). Logic circuitry has logic inputs receiving outaux and outmain, and a logic output providing a decision result for the dual-comparator circuit using outmain when in the first OM and outaux when in the second OM.