The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Jun. 25, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Wu-Hsin Chen, San Diego, CA (US);

Sriramgopal Sridhara, San Diego, CA (US);

Li Liu, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 21/00 (2006.01); H03K 23/00 (2006.01); H03K 25/00 (2006.01); H03L 7/18 (2006.01); H03K 3/017 (2006.01); H03K 5/156 (2006.01); H03K 21/08 (2006.01);
U.S. Cl.
CPC ...
H03L 7/18 (2013.01); H03K 3/017 (2013.01); H03K 5/1565 (2013.01); H03K 21/08 (2013.01);
Abstract

A frequency divider with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit and at least one duty cycle adjustment circuit coupled in a feedback loop. The divider circuit(s) receive a clock signal at a first frequency and provide at least one divided signal at a second frequency, which is a fraction of the first frequency. The duty cycle adjustment circuit(s) adjust the duty cycle of the at least one divided signal and provide at least one duty cycle adjusted signal to the divider circuit(s). The divider circuit(s) may include first and second latches, and the duty cycle adjustment circuit(s) may include first and second duty cycle adjustment circuits. The first and second latches and the first and second duty cycle adjustment circuits may be coupled in a feedback loop and may perform divide-by-2.


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