The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Aug. 20, 2013
Applicant:

Innolux Corporation, Miaoli County, TW;

Inventors:

Wen-Tsai Hsu, Miaoli County, TW;

Chien-Hsueh Chiang, Miaoli County, TW;

Assignee:

INNOLUX CORPORATION, Miaoli County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); H03K 17/16 (2006.01); G09G 3/36 (2006.01); G11C 19/28 (2006.01);
U.S. Cl.
CPC ...
H03K 17/162 (2013.01); G09G 3/3677 (2013.01); G09G 3/3696 (2013.01); G11C 19/287 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/02 (2013.01); G09G 2320/0238 (2013.01);
Abstract

This disclosure provides a gate driver circuit in a display. The gate driver circuit includes shift registers configured for receiving clock and start signals and generating a gate signal to drive a row of the pixels, arranged at intersections of the gate lines and the data lines on a panel, each register comprising: a control unit having a clock input, a first voltage input, a second voltage input, and a first output; and a first output unit having a first pull-down TFT electrically connected to one of the first outputs and a gate-driving terminal configured for providing the gate signal; wherein one of the clock signals at the clock input is provided to the first output unit; and a first control signal's period at the first output is longer than the clock signal's period at the clock input and shorter than the period of a frame.


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