The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Oct. 16, 2013
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Akira Inoue, Osaka, JP;

Toshiyuki Fujita, Osaka, JP;

Masaki Fujikane, Osaka, JP;

Toshiya Yokogawa, Nara, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/15 (2006.01); H01L 33/32 (2010.01); H01L 23/00 (2006.01); H01L 33/38 (2010.01); H01L 33/22 (2010.01);
U.S. Cl.
CPC ...
H01L 33/32 (2013.01); H01L 24/05 (2013.01); H01L 33/382 (2013.01); H01L 33/22 (2013.01); H01L 33/38 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05552 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2933/0016 (2013.01);
Abstract

A nitride semiconductor light emitting chip includes: a conductive substrate including a nitride semiconductor layer; an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer sequentially formed on a principal surface of the nitride semiconductor layer; and an n-side electrode formed in contact with the conductive substrate. A recess is formed in a back surface of the conductive substrate opposite to the principal surface. The n-side electrode is in contact with at least part of a surface of the recess. A depth D1 is not less than 25% of a thickness T, where T represents a thickness of the conductive substrate, and D1 represents a depth of the recess.


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