The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2016
Filed:
Aug. 28, 2013
Applicant:
Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;
Inventor:
WeiHai Bu, Shanghai, CN;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01); H01L 29/165 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66477 (2013.01); H01L 21/02381 (2013.01); H01L 21/02532 (2013.01); H01L 21/02639 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/66636 (2013.01); H01L 29/7834 (2013.01); H01L 29/7848 (2013.01); H01L 29/165 (2013.01);
Abstract
A semiconductor device fabrication method is provided in which recesses are formed at source/drain positions in the substrate, removable sidewalls are formed on side walls of the recess, and the recesses then are etched to form Sigma shaped recesses. Selective epitaxial growth of substantially un-doped SiGe in the Sigma shaped recesses is performed, and the Sigma shaped recesses close to the surface of the substrate can be protected from epitaxial growth by the removable sidewalls. Epitaxial growth of SiGe doped with a P-type impurity can be performed in the Sigma shaped recesses after removing the sidewalls.