Semiconductor memory devices having increased distance between gate electrodes and epitaxial patterns and methods of fabricating the same

Abstract

A semiconductor memory device is provided including a substrate, a plurality of interlayer insulating layers and gate electrodes alternately stacked on the substrate. The plurality of interlayer insulating layers and the gate electrodes define a channel hole that vertically penetrates the plurality of interlayer insulating layers and the gate electrodes to expose at least a portion of the substrate. A channel recess is provided in the substrate exposed by the channel hole. An epitaxial pattern fills the channel recess. The epitaxial pattern has an upper surface that is concave and curves inward in a middle portion thereof.