The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Dec. 04, 2014
Applicant:

Sony Corporation, Tokyo, JP;

Inventor:

Masanori Tsukamoto, Boise, ID (US);

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/768 (2006.01); H01L 45/00 (2006.01); H01L 27/108 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 21/31111 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 27/1085 (2013.01); H01L 27/10888 (2013.01); H01L 45/14 (2013.01); H01L 45/144 (2013.01); H01L 45/146 (2013.01); H01L 45/1608 (2013.01);
Abstract

Exemplary embodiments of the present invention are directed towards a method for fabricating a self-aligned contact under a bitline in a damascene structure for a memory device comprising forming a dummy pattern, forming dielectric sidewalls using a first dielectric film around the dummy pattern, forming a second dielectric film around the dielectric sidewalls, removing the dummy pattern forming a plurality of trenches, depositing active cell material in each of the plurality of trenches, forming a third dielectric film atop the active cell material; and creating a self-aligned contact hole using etch selectivity between the dielectric sidewalls and the second dielectric film.


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