The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2016

Filed:

Feb. 19, 2015
Applicant:

SK Hynix Inc., Icheon-si Gyeonggi-do, KR;

Inventor:

Il Cheol Rho, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/3205 (2006.01); H01L 21/324 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76879 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/02274 (2013.01); H01L 21/31111 (2013.01); H01L 21/324 (2013.01); H01L 21/32053 (2013.01); H01L 21/7682 (2013.01); H01L 21/76802 (2013.01); H01L 21/76831 (2013.01); H01L 21/76846 (2013.01); H01L 21/76852 (2013.01); H01L 21/76855 (2013.01); H01L 21/76885 (2013.01); H01L 21/76897 (2013.01); H01L 23/53238 (2013.01); H01L 21/76843 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Methods of fabricating interconnection structures of a semiconductor device are provided. The method includes, inter alia: forming a first insulation layer on a semiconductor substrate, forming a mold layer having trenches on the first insulation layer, forming a sidewall protection layer including a first metal silicide layer on sidewalls of the trenches, forming second metal lines that fill the trenches, forming upper protection layers on the second metal lines, removing the mold layer after formation of the upper protection layers to provide gaps between second metal lines, and forming a second insulation layer in the gaps and on the upper protection layers. The second insulation layer is formed to include air gaps between the second metal lines. Related interconnection structures are also provided.


Find Patent Forward Citations

Rho, Il. (2016). Interconnection structures in a semiconductor device and methods of manufacturing the same (U.S. Patent No. 9379009). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9379009

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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