The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2016

Filed:

Jan. 29, 2014
Applicant:

Sharp Kabushiki Kaisha, Osaka-shi, JP;

Inventors:

Shinichi Kawato, Osaka, JP;

Takashi Ochi, Osaka, JP;

Yuhki Kobayashi, Osaka, JP;

Masahiro Ichihara, Mitsuke, JP;

Eiichi Matsumoto, Mitsuke, JP;

Assignee:

SHARP KABUSHIKI KAISHA, Osaka-Shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/32 (2006.01); H01L 51/00 (2006.01); H01L 51/56 (2006.01); C23C 14/24 (2006.01); C23C 14/04 (2006.01); H01L 51/50 (2006.01);
U.S. Cl.
CPC ...
H01L 27/3211 (2013.01); C23C 14/04 (2013.01); C23C 14/24 (2013.01); H01L 51/001 (2013.01); H01L 51/0011 (2013.01); H01L 51/56 (2013.01); H01L 51/0008 (2013.01); H01L 51/5012 (2013.01);
Abstract

The present invention provides a display device which inhibits deterioration in display quality caused by color mixture of luminescent layers. In a case where vapor deposition particles are deposited onto a substrate, P+2Lc≧{(Ts×M+0.96×G×Wn)/(Ts−G)}+2Dm and 3 μm≦Dm ≦5 μm are satisfied, where 'M' is a width of a mask opening, 'Wn' is a width of an injection hole, “G” is a distance between the TFT substrate and a vapor deposition mask, “Ts” is a distance between the TFT substrate and a vapor deposition source, “P” is a width of a first pixel opening, and “Lc” is a width of a non-display region.


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