The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 21, 2016

Filed:

Dec. 07, 2015
Applicants:

Sung-min Hwang, Seoul, KR;

Han-soo Kim, Suwon-si, KR;

Sun-il Shim, Seoul, KR;

Inventors:

Sung-Min Hwang, Seoul, KR;

Han-soo Kim, Suwon-si, KR;

Sun-il Shim, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 16/08 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); H01L 27/0207 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01);
Abstract

A semiconductor memory device includes: a semiconductor region extending vertically from a first region of a substrate; a plurality of gate electrodes disposed on the first region of the substrate in a vertical direction, but separated from each other along a sidewall of the semiconductor region; a gate dielectric layer disposed between the semiconductor region and the plurality of gate electrodes; a substrate contact electrode extending vertically from the impurity-doped second region of the substrate; and an insulating region formed as an air gap between the substrate contact electrode and at least one of the plurality of gate electrodes.


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