The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Mar. 24, 2015
Applicant:

Intrinsix Corporation, Marlborough, MA (US);

Inventor:

Eugene M. Petilli, Victor, NY (US);

Assignee:

Intrinsix Corporation, Marlborough, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N 5/235 (2006.01); H04N 5/378 (2011.01); H04N 5/3745 (2011.01); H04N 5/232 (2006.01); H04N 5/262 (2006.01); H04N 9/82 (2006.01);
U.S. Cl.
CPC ...
H04N 5/378 (2013.01); H04N 5/23296 (2013.01); H04N 5/37455 (2013.01); H04N 9/8227 (2013.01);
Abstract

The invention provides an imager readout architecture utilizing analog-to-digital converters (ADC), the architecture comprising a band-limited sigma delta modulator (SDM) ADC; and a serpentine readout, which can be configured to allow the band-limited SDM to multiplex between multiple columns by avoiding discontinuities at the edges of a row. SDM ADC image reconstruction artifacts are minimized using a modified serpentine read out methodology, the methodology comprising using primary and redundant slices with the serpentine read out in opposite directions and averaging the slices. Advantageously, the invention can be used to develop a read out integrated circuit (ROIC) for strained layer superlattice imagers (SLS) using sigma delta modulator (SDM) based analog to digital converters (SDM ADC).


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