The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Dec. 21, 2015
Applicant:
Seiko Instruments Inc., Chiba-shi, Chiba, JP;
Inventors:
Yotaro Nihei, Chiba, JP;
Tomoyuki Yokoyama, Chiba, JP;
Assignee:
SII SEMICONDUCTOR CORPORATION, Chiba, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/12 (2006.01); H03B 5/24 (2006.01);
U.S. Cl.
CPC ...
H03K 5/12 (2013.01); H03B 5/24 (2013.01);
Abstract
Provided is a voltage regulator which consumes low power and uses an NMOS transistor as an output transistor. A delay circuit includes, between a constant current circuit and a capacitor, a depletion type NMOS transistor having a gate and a back gate each connected to a ground terminal, the constant current circuit including a depletion type NMOS transistor and a resistor connected between each of a gate and a back gate of the depletion type NMOS transistor and a source thereof.