The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Feb. 07, 2014
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Kouji Takahashi, Shiga, JP;

Shigeki Nakamura, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/16 (2006.01); H03F 1/02 (2006.01); H03F 3/21 (2006.01); H03F 1/22 (2006.01); H03F 3/195 (2006.01); H03F 3/24 (2006.01); H03F 3/30 (2006.01); H03F 3/193 (2006.01); H04B 1/04 (2006.01); H03F 3/08 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0205 (2013.01); H03F 1/223 (2013.01); H03F 3/08 (2013.01); H03F 3/193 (2013.01); H03F 3/195 (2013.01); H03F 3/21 (2013.01); H03F 3/211 (2013.01); H03F 3/245 (2013.01); H03F 3/3028 (2013.01); H04B 1/0475 (2013.01); H03F 2200/171 (2013.01); H03F 2200/408 (2013.01); H03F 2200/411 (2013.01); H03F 2200/451 (2013.01); H03F 2200/555 (2013.01); H04B 2001/0408 (2013.01);
Abstract

An amplifier is disclosed that avoids an increase in circuit scale and an increase in power consumption, and easily avoids the odd-order harmonics. This amplifier includes a MOS transistor including a plurality of gate fingers or a plurality of MOS transistors each including a single gate finger; a dielectric capacitor that is added to each of the gate fingers; and a variable resistor that is connected between an input terminal to which an AC signal is input, and a gate input terminal. In the amplifier, the variable resistor, gate resistors of the respective gate fingers, and the dielectric capacitors form a plurality of low pass filters having desired frequency characteristics, and the gate fingers are different from each other in width or length from the gate input terminal to an oxide diffusion (OD) area boundary.


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