The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Apr. 03, 2007
Ashay Chitnis, Goleta, CA (US);
James Ibbetson, Santa Barbara, CA (US);
Ashay Chitnis, Goleta, CA (US);
James Ibbetson, Santa Barbara, CA (US);
CREE, INC., Goleta, CA (US);
Abstract
A method for fabricating semiconductor and electronic devices at the wafer level is described. In this method, dielectric material is used to wafer bond a device wafer to a submount wafer, after which vias can be structured into the submount wafer and dielectric bonding material to access contact pads on the bonded surface of the device wafer. The vias may subsequently be filled with electrically and thermally conducting material to provide electrical contacts to the device and improve the thermal properties of the finished device, respectively. The post-bonding process described provides a method for fabricating a variety of electronic and semiconductor devices, particularly light emitting diodes with electrical contacts at the bottom of the chip.