The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Jan. 19, 2012
Applicants:

Yoann Guillemenet, Crest, FR;

Lionel Torres, Combaillaux, FR;

Guillaume Prenat, Grenoble, FR;

Kholdoun Torki, Fontaine, FR;

Gregory Di Pendina, Echirolles, FR;

Inventors:

Yoann Guillemenet, Crest, FR;

Lionel Torres, Combaillaux, FR;

Guillaume Prenat, Grenoble, FR;

Kholdoun Torki, Fontaine, FR;

Gregory Di Pendina, Echirolles, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01); G11C 11/15 (2006.01); G11C 11/16 (2006.01); G11C 11/412 (2006.01); H03K 19/0175 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 11/15 (2013.01); G11C 11/16 (2013.01); G11C 11/412 (2013.01); G11C 13/0002 (2013.01); H03K 19/017581 (2013.01);
Abstract

The invention concerns a memory device comprising at least one memory cell comprising: a first transistor () coupled between a first storage node () and a first resistance switching element () programmed to have a first resistance; and a second transistor () coupled between a second storage node () and a second resistance switching element () programmed to have a second resistance, a control terminal of said first transistor being coupled to said second storage node, and a control terminal of said second transistor being coupled to said first storage node; and control circuitry () adapted to store a data value (D) at said first and second storage nodes by coupling said first and second storage nodes to a first supply voltage (V, GND), the data value being determined by the relative resistances of the first and second resistance switching elements.


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