The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Jan. 09, 2009
Applicants:

Ji-hyun Kwon, Asan-si, KR;

Ho-kyoon Kwon, Seoul, KR;

Dong-hyon Ki, Seoul, KR;

Won-hee Lee, Seoul, KR;

Inventors:

Ji-Hyun Kwon, Asan-si, KR;

Ho-Kyoon Kwon, Seoul, KR;

Dong-Hyon Ki, Seoul, KR;

Won-Hee Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); G11C 19/18 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3674 (2013.01); G11C 19/184 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/043 (2013.01);
Abstract

In the display apparatus, a gate driver receives at least one clock to sequentially provide gate lines in a display panel with a gate signal in a high state corresponding to a high interval of the clock. The gate driver includes a plurality of amorphous silicon transistors and is formed in the display panel through a thin film process. The clock has a delay time of about 2.0 μs or less. If the delay time of the clock is reduced less than about 2.0 μs, a threshold voltage margin of the transistors increases, so that the gate driver may not malfunction in a high temperature aging process. As a result, the gate driver may be prevented from malfunctioning in the high temperature aging process.


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