The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Aug. 12, 2008
Applicants:

Glenn A. Mayfield, Lafayette, IN (US);

Matthew Eric Kraus, Jamestown, IN (US);

David Andrew Bobick, West Lafayette, IN (US);

Timothy C. Everidge, Lafayette, IN (US);

Inventors:

Glenn A. Mayfield, Lafayette, IN (US);

Matthew Eric Kraus, Jamestown, IN (US);

David Andrew Bobick, West Lafayette, IN (US);

Assignee:

Radian Research, Inc., Lafayette, IN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01R 35/02 (2006.01); G01R 1/20 (2006.01); G01R 29/20 (2006.01);
U.S. Cl.
CPC ...
G01R 35/02 (2013.01); G01R 1/203 (2013.01); G01R 31/027 (2013.01); G01R 29/20 (2013.01);
Abstract

A method and apparatus for testing a transformer. A controller generates a switching signal and supplies the switching signal to a solid state switch in circuit with a test load of known magnitude, switching the solid state switch to place the test load in circuit with the transformer. A signal through or across the transformer is then measured. Methods and apparatus for testing a transformer comprise the controller and solid state switch placing a series of test loads of different known magnitudes in circuit with the transformer from the lowest magnitude to the highest, from the highest to the lowest, or both. Additionally, a test load array comprises a plurality of power resistors, a heat sink for accommodating the plurality of power resistors, and a material providing electrical insulation of the power resistors from the heat sink and thermal conductivity between the power resistors and the heat sink.


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