The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Dec. 16, 2013
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventor:
Girishankar Gurumurthy, Bangalore, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318541 (2013.01); G01R 31/318575 (2013.01);
Abstract
A scan flip flop includes a partial multiplexer coupled to a master latch. The partial multiplexer is configured to receive a scan enable (SCAN) where the partial multiplexer includes an OR gate coupled to a tri-stated AND gate. A tri-state inverter is coupled to an output of the master latch and a slave latch is configured to receive an output of the tri-state inverter. A delay element is coupled to the slave latch, where the delay element is configured to delay a first output of the slave latch in response to the scan enable to generate a dedicated scan output.