The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2016

Filed:

Oct. 03, 2013
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

William E. Edwards, Ann Arbor, MI (US);

Mike R. Garrard, Jaywick, GB;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01B 7/30 (2006.01); G01D 5/20 (2006.01); G01P 3/488 (2006.01); G01P 3/489 (2006.01); G08C 13/00 (2006.01); G01P 1/00 (2006.01); G01L 7/00 (2006.01);
U.S. Cl.
CPC ...
G01D 5/20 (2013.01); G01P 3/488 (2013.01); G01P 3/489 (2013.01); G01L 7/00 (2013.01); G01P 1/00 (2013.01); G08C 13/00 (2013.01);
Abstract

The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. In one embodiment the VRS interface uses a comparator with hysteresis to generate a trailing edge signal. In another embodiment the VRS interface uses bias voltages to reduce the probability of erroneous transitions in a trailing edge signal. In either case the VRS interface can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.


Find Patent Forward Citations

Loading…