The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2016

Filed:

Aug. 27, 2014
Applicant:

Sharp Laboratories of America (Sla), Inc., Camas, WA (US);

Inventor:

Themistokles Afentakis, Camas, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1343 (2006.01); G02F 1/136 (2006.01); H05K 1/02 (2006.01); G02F 1/1368 (2006.01); G02F 1/1333 (2006.01); H01L 27/12 (2006.01); H01L 27/146 (2006.01); H01L 27/15 (2006.01); H01L 27/32 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
H05K 1/028 (2013.01); G02F 1/1368 (2013.01); G02F 1/133305 (2013.01); G02F 1/134336 (2013.01); H01L 27/124 (2013.01); H01L 27/1218 (2013.01); H01L 27/14612 (2013.01); H01L 27/15 (2013.01); H01L 27/3244 (2013.01); H01L 51/0097 (2013.01); H05K 1/0296 (2013.01); H01L 2251/5338 (2013.01);
Abstract

A flexible active matrix array is provided, made with a flexible substrate and an array of pixels overlying the substrate, where each pixel includes an active device and a light controlling device. The array also includes a plurality of parallel row lines overlying the substrate, with each row line formed in serpentine pattern with a plurality of partial-loops, to supply a first signal to a corresponding plurality of pixels. A plurality of parallel column lines overlies the substrate, orthogonal to the row lines. Each column line is formed in a serpentine pattern with a plurality of partial-loops, to supply a second signal to a corresponding plurality of pixels. Each pixel has a border, with each row line partial-loop formed along about 75% of a pixel border, and each column line partial-loop formed along about 75% of a pixel border. Also provided is a printed circuit board with serpentine traces.


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